New Delhi

Union Minister for Electronics & Information Technology Ashwini Vaishnaw on Saturday handed over 28 chips fabricated at the Semiconductor Laboratory (SCL), Mohali, including 600 bare dies and 600 packaged chips, all designed by students from 17 academic institutions under the Chips to Start-up (C2S) Programme.

The chip handover ceremony took place during the Minister’s visit to SCL on November 28 to review ongoing modernisation efforts and overall progress at the facility.

Speaking at the event, Vaishnaw said India was rapidly emerging as a distinctive leader in the global semiconductor ecosystem.
“Today, institutions across the country have access to some of the world’s most advanced design technologies, creating a large-scale semiconductor development ecosystem that is unique to India,” he said.

During the visit, the Director General of SCL and the team presented a detailed overview of the chip design and fabrication processes executed under the C2S Programme, which leverages a collaborative approach between SCL and the ChipIN Centre.

Over the past year, the ChipIN Centre conducted five MPW (multi-project wafer) shuttle runs, receiving 122 chip designs from 46 institutions. Of these, 56 student-designed chips have been successfully fabricated and delivered.

Vaishnaw emphasised that this progress reflects the vision of Prime Minister Narendra Modi, who has directed that India build semiconductor capabilities of such scale that the nation becomes a global semiconductor power within the next few years.
He highlighted the objective of achieving self-reliance in strategic sectors through indigenous chip manufacturing, noting that SCL will play a critical role in this strategy.

The ChipIN Centre provides infrastructure, design tools, and mentorship to students and startups participating in the C2S Programme. It collects chip designs from academic institutions, verifies fabrication readiness, and sends them to SCL for production every three months. Multiple designs are merged onto a single mask, allowing efficient fabrication of several chips in one batch.

The initiative aims to make semiconductor design more accessible and strengthen the base of India’s expanding electronics ecosystem.

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The C2S Programme has witnessed nationwide participation, with over one lakh students using more than 125 lakh hours of EDA tools. Additionally, 90 startups utilised around 50 lakh hours of design time. Altogether, the programme accounts for more than 175 lakh hours of tool usage, making it one of the largest centralised chip design initiatives globally.